1. Field of the Invention
The present invention relates to a signal processing device having a circuit portion of temporarily storing a plurality of output signals and then reading the stored signals and to an image pickup apparatus using such a device.
2. Description of the Related Art
FIG. 13 is a circuit diagram of an image pickup apparatus utilizing a signal processing device having a conventional structure.
In a conventional line sensor or area sensor, output signals from pixels 1001 are once held in holding capacitors 1003 via vertical output lines 1002, thereafter, the output signals held in the holding capacitors are sequentially read to a horizontal common signal line 1005 by a horizontal scanning circuit 1004, and output to a common read amplifier 1007.
An output from the holding capacitor 1003 to the horizontal common signal line 1005 is determined by a capacitor division of a capacitance CT of the holding capacitor 1003 and a horizontal common signal line capacitance Ch 1006 constituted of a parasitic capacitance and the like of the horizontal common signal line 1005.
Namely, by representing a reset voltage of the horizontal common signal line 1005 by Vchr and a voltage across the holding capacitor 1006 by Vsig+Vchr, a voltage output to the horizontal common signal line 1005 is given by the following equation:
                    V        =                                                            Ct                ×                                  (                                      Vsig                    +                    Vchr                                    )                                            +                              Ch                ×                Vchr                                                    (                              Ct                +                Ch                            )                                =                                                    Ct                ×                Vsig                                            (                                  Ct                  +                  Ch                                )                                      +            Vchr                                              (        1        )            As shown, a read gain of an optical signal is given by CT(CT+Ch).
The horizontal common signal line capacitance Ch 1006 is constituted of its wiring line capacitance Ch_l and a source-drain capacitance Ch_j of switches connected to the wiring line. Because a recent solid state image pickup apparatus has a number of pixels and a large panel, there is a tendency of an increase in the Ch capacitance, such as an increase in the source-drain capacitance and an increase in the long wiring line capacitance.
For example, in a large panel sensor of a film size recently paid attention, the length of the horizontal common signal line is about 20 mm. In this case, the wiring line capacitance Ch_l becomes as large as 5 pF and the source-drain capacitance Ch_j becomes as large as 12 pF.
Assuming that the CT capacitance is 5 pF, the read gain of an optical signal is 0.23.
The number of stages of the horizontal scanning circuit 1004 increases as a number of pixels are used. In addition, if the read frame rate is not changed, the data rate, i.e., an operation frequency, becomes high. By representing the number of pixels by N, the number of stages increases in proportion to a root of N and the operation frequency becomes high in proportion to N. Therefore, a consumption power is given by:P=N3/2×CO×V2×F where N is the number of pixels, CO is a constant, V is a power supply voltage and F is a frame rate.
Each time a drive pulse is applied to the horizontal scanning circuit 1004, a large current flows through the horizontal scanning circuit 1004 and a large clock noise is generated. In some cases, this clock noise is superposed upon an output from the read common amplifier and the incorrect output is obtained. Shading may also occur because of this clock noise. Such a phenomenon becomes conspicuous on a large panel, mega-pixel solid state image pickup apparatus among others.
The present inventors have clarified the mechanism of this phenomenon.
This mechanism will be described in detail with reference to FIG. 14.
FIG. 14 is a schematic cross sectional view of a signal processing device applied to the solid state image pickup apparatus shown in FIG. 13.
In FIG. 14, reference numeral 1101 represents an n-type semiconductor substrate and reference numeral 1102 represents a p-type semiconductor region formed in the n-type semiconductor substrate 1101. Reference numeral 1108 represents a p-type MOS transistor formed in the n-type semiconductor substrate 1101 and reference numeral 1109 represents an n-type MOS transistor formed in the p-type semiconductor region 1102. The p-type MOS transistor 1108 and n-type MOS transistor 1109 schematically show a CMOS circuit in the horizontal scanning circuit 1104. Reference numeral 1103 represents a holding capacitor made of a pMOS inverted capacitor. Since an output signal from a pixel is in the range from 0 to 3 V, the pMOS inverted capacitor has been used as the holding capacitor 1103. The reason for this is as follows. Since the image pickup apparatus uses electrons among pairs of electrons and holes generated by photoelectric conversion, an nMOS source follower amplifier is used as the amplifier circuit in a pixel. In this case, if the power supply voltage is 5 V, the source follower in the dark state outputs a signal lower than an input signal by a threshold voltage. This signal takes 2 to 3 V, upon which an optical signal is superposed, and a lower voltage is output. A capacitor having a constant capacitance in such a voltage range cannot be formed by using an nMOS capacitor. From this reason, the pMOS inverted capacitor has been used.
Next, a method of driving the conventional signal processing device shown in FIG. 14 will be described.
FIG. 15 is a timing chart showing the response waveform of a signal read from the signal processing device shown in FIG. 14 and other voltage changes when a drive reference clock is input to the horizontal scanning circuit 1104.
Referring to FIG. 15, synchronously with a rise and fall of a reference clock, switches in the horizontal scanning circuit turn on and off at the same time so that a large current flows through a power supply line VDD or VSS. Therefore, each power supply line is subjected to a voltage change corresponding to the wiring resistance. Since a large current cannot be supplied only from the power supply line, charges are pulled out from the n-type semiconductor substrate 1101 which is a large charge pool. Therefore, the n-type semiconductor substrate (NSUB) 1101 itself is subjected to a voltage change as shown in FIG. 15. As the voltage at NSUB changes, the voltage at the common signal line capacitively coupled (Ch—1) to NSUB changes greatly, which results in an “output signal” waveform shown in FIG. 15. It takes a time until the waveform is stabilized. From this reason, the operation frequency cannot be made high.
Since NSUB is used as a reference terminal of the holding capacitor CT made of a pMOS inverted capacitor, as the voltage at NSUB changes, noises appear on the common signal line via the holding capacitor CT and transfer switch. In this case, a large output difference appears depending upon the horizontal position, which is called shading. The reason for this is as follows.
A voltage change at NSUB is different at each horizontal position. Obviously the voltage at NSUB as the ground terminal of the holding capacitor is fixed to ground by a metal wiring pattern. However, the resistance of this wiring pattern cannot be neglected if the image pickup apparatus has a large panel, and the resistance value of the metal wiring pattern for fixing to the ground terminal changes with the horizontal position. As the voltage at NSUB changes with the horizontal position, the output signal value changes with the horizontal position. If the signal processing stands by until clock noises disappear, this shading can be suppressed. However, the operation frequency cannot be made high.
FIG. 16 is a circuit diagram of a conventional image pickup apparatus. As shown in FIG. 16, the region under the holding capacitors 1003 and horizontal common signal line 1005 corresponds to the semiconductor substrate 1001 shown in FIG. 15.